The power sequence in the desktop motherboard is the exchange of signals between the motherboard Chips that takes place before anything appears on the screen.
The power sequence is the phase in which the motherboard prepares itself to function. This phase consists of sending orders to different voltages and signal generators from some ICs and receiving confirmations. Secondly, It makes sure that the principal Chips of the desktop motherboard are functional.
The Power Sequence In The Desktop Motherboard Is Given Below
The following are steps for power sequence in a desktop motherboard :
1. Standby Voltage 5VSB
Standby Voltage 5 volt sent by SMPS from its purple wire and given to SIO VSB pin.
2 Power Button Press SMPS Turn On
When the power button is pressed then communication takes place between SIO and PCH and then SPMS tuns on. After it, all buck converters turn on one after another.
3. Power Good
Firstly Power Good is a confirmation signal given to PCH.
4. Reset
The reset signal clears any junk value that remains in the chips and all chips resume.
5. Clock
Clock chips provide different clock frequencies (timing) accordingly requirements of the chips.
6. BIOS
CPU read BIOS and run stat up sequence.
7. Post
In this step, BIOS checks power on self test.
8. DIsplay
When the motherboard completes all tests display appears.
The Signal Ladder For The Power Sequence In The Desktop Motherboard
The following are steps for the signal ladder for the power sequence in the desktop motherboard :
| Step No | Power And Signal Steps | Description For Step |
|---|---|---|
| 1 | Stand Voltage 5VSB | 5 Volt standby coming from SMPS going to SIO power on. Moreover, It is VSB pin before power on. |
| 2 | Power Button Press SMPS Turn On | First up all voltages get Turn On. Secondly, power gets supplied to DDR, ICH, MCH, PCH, and CPU core voltages. |
| 3 | Power Good | Confirmation signal from SMPS and VRM section saying all power ok. |
| 4 | Reset | All power ok signals get generated after a successful Reset signal. Secondly, PCH generates a reset called FIRST. Lastly, This signal Clear’s motherboards all existed junk values. |
| 5 | Clock | In this step, the Clock Chip or PCH generates different clock frequencies according to the requirement. |
| 6 | BIOS | CPU reads BIOS |
| 7 | POST | Power on self test does checkings for all chips. |
| 8 | Display | In this step, the motherboard displays output on the screen. |
The Signal Names And Description For The Power Sequence In The Desktop Motherboards
The following are signal names and descriptions for the power sequence in the desktop motherboards repair :
| Signal Name | Direction | Description |
|---|---|---|
| VSB | The purple wire from SMPS | Standby voltage purple wire from the power supply. |
| RSMRST | SIO to ICH (PCH) | Resume and reset signal from SIO to ICH (PCH). |
| PSIN(PANSW) | Power witch to SIO | Power switch |
| PSOUT(PWRON) | SIO to ICH (PCH) | SIO asking permission to ICH (PCH) for power on. |
| SLP3(SUSB) | ICH (PCH) to SIO | Turn on power |
| SLP4(SUSC) | ICH(PCH) to SIO | Turn on power |
| PSON | SIO to SMPS | Turn on SMPS green wire 5 volt to zero volt |
| PLTRST | ICH(PCH) | Reset the entire motherboard platform reset |
| CLK_EN | ICH to clock chip | Clock enable |
| CPURST | MCH to CPU | Reset CPU 1 volt |
| CLK | clock | Clock signal |
| CPU_PWRGD | ICH(PCH) to CPU | CPU voltage ok |
| PWR OK | SMPS to SIO | Grey wire from SMPS |
| VCCORE | VRM to CPU | CPU core voltage |
| GFXCORE | VRM to CPU(gfx) | GRAPHICS supply ok |
| DRAMPWRGD | PCH to CPU | RAM power ok |
| CS | PCH to BIOS | Chip select signal PCH ready to read BIOS |
| VTT POWER | To CPU | Internal CPU voltages |
| VTT_POWERGD | VTT power to CPU | VTT power good or it means the VTT power section is in ‘ok’ condition. |
When there is no display generated then you have to check all voltages including the CPU core.
Secondly, after the PLTRST signal is generated by ICH. Finally, CPU gets reset and the CPU access’s FSB bus.
The Power Sequence for New Generations Desktop Motherboards
The following are power sequences for new generations of desktop motherboards :
| Number | Signal Name | Description |
|---|---|---|
| 1 | 5VSB and 3VDUAL | 5 volt coming from purple wire SMPS. This supply is then given to SIO. |
| 2 | DPWROK | Power confirmation to PCH |
| 3 | RSMRST | Resume and reset are then sent by SIO to PCH. |
| 4 | SIO to ICH (PCH) | Power switch signal |
| 5 | PWRON | In this power switch signal is sent by SIO to PCH |
| 6 | SLP_S4, SLP_S3 | Wake up the signal sent by PCH to SIO |
| 7 | PSON | Power on the signal sent by SIO to SMPS |
| 8 | H/W MONITOR | SIO monitor signals |
| 9 | PWROK | Power ok signal from SMPS to SIO |
| 10 | DDR_EN | RAM power enables signal from SIO |
| 11 | VCC1_05_EN | Enable signal from SIO |
| 12 | VCC18_EN | Enable signal from SIO |
| 13 | VCC1_05_PCH | 1.05 volt output |
| 14 | VTT_PWRGD | VTT power good signal |
| 15 | VCORE | CPU CORE voltage |
| 16 | VR_RDY | CPU Core voltage ready signal |
| 17 | PWROK1 | Power ok signal from SIO to PCH |
| 18 | PCH_VRMPWRGD | CPU power ok signal |
| 19 | PFMRST | When all power ok the PCH generates this signal called platform reset. |
| 19 | CPURST | SIO generates CPU reset when it receives PFMRST |
You can also see for laptop chip level repair career guide to kickstart your career.